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Author Topic: Phase One/Kodak sensors, next generation?  (Read 18791 times)
bob mccarthy
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« Reply #20 on: October 11, 2006, 04:08:53 PM »
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I thought when you got into the 5 to 6 micron pixel range, the optimum f stop was in the 5.6 to 8.0 range. This might work well with a DX chip but with the much longer lenses in MF, wouldn't decent DOF be an issue!! Isn't difraction about to rear it's ugly head, if one stopped down for needed DOF?

bob
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Ed Jack
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« Reply #21 on: October 12, 2006, 07:31:56 AM »
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Most guys in my business have to support both formats, and if I could go totally MF, the current price on a P30+ would be offset by halving my investment in 35mm gear. 
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Game set & match Phase One /Kodak ?

The Plus serries is a real great maturation of a product with lasting value and usability, as I think it targets the shortcomings of previous generations. I look forward to a review of iso 800 performance - maybe something for the next video journal - the last one of my current subscription.

Ed
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michael
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« Reply #22 on: October 12, 2006, 11:04:45 AM »
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I expect to get a P45 Plus for testing in time for my February Antarctic trip, which I plan to do this time all in MF.

Michael
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BJL
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« Reply #23 on: October 13, 2006, 11:40:48 AM »
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I thought when you got into the 5 to 6 micron pixel range, the optimum f stop was in the 5.6 to 8.0 range. This might work well with a DX chip but with the much longer lenses in MF, wouldn't decent DOF be an issue!! Isn't difraction about to rear it's ugly head, if one stopped down for needed DOF?

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Maybe a bit pessimistic on the f-stop limits, but basically I agree.

Experience (backed by optical theory) seems to show that diffraction starts to limit resolution when the aperture ratio is about twice the pixel pitch. For example reports give a limit of f/8 to f/11 with the 5.5 micron pitch of the D2X.

So a 60MP 36x48mm back (5.5 micron pixel pitch) would only give its full potential detail at about f/11 and below. Due to the larger focal lengths involved, that DOF is like about f/8 and below in 35mm format. Then allow for the high degree of enlargement and large print sizes that would be needed to see all that detail in the first place: compared with a humble 16MP image printed at the same PPI and viewed from the same distance, the degree of enlargement would be doubled, reducing perceived DOF to that of f/4 in 35mm format. Or to "f/2.8 equivalent" for an 8MP image at the same PPI and viewing distance.

The combination of extrremely high detail and shallow perceived DOF on prints big enough to reveal that detail sounds rather limited in applicability, but could still be great for appropriate scenes, like landscapes with no foreground elements needing to be sharp. No surprise I suppose that 60MP MF would be targetted at rather special purposes and needs.
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eronald
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« Reply #24 on: October 13, 2006, 12:33:22 PM »
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I expect we'll get better ISO and bigger sensors in the next gen - in spite of what the word on the street is -all the cameras out there can project a larger image area. Then of course there will at some point be some innovative Foveon-type technology ...

Edmund
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Edmund Ronald, Ph.D. 
nik
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« Reply #25 on: October 13, 2006, 04:49:36 PM »
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Quote from: eronald,Oct 13 2006, 10:33 AM
I expect we'll get better ISO and bigger sensors in the next gen -
Edmund

I'm sure many of us have been hoping for larger sensors (full 645 format) in the next generation of sensors in addition to all the other 'must haves', but I'm not sure we will. Isn't this a better way of adding MPix ?
If anyone out there can shed some light on the manufacturing and cost of making a larger sensor in 645 or 6x6 format, I'd appreciate it, is it very similar to CPU manufacture?

-Nick


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eronald
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« Reply #26 on: October 13, 2006, 05:34:08 PM »
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I'm a bit out of date. My impression is that Moore's law applies to stepping on wafers and wafer surface. Which would mean full-frame 645 should be economically feasible around the next generation - my feeling is that the chipmakers are protesting a bit too much that it won't happen. Maybe they would prefer not to do those chip sizes and get some more profilt .

Edmund

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I'm sure many of us have been hoping for larger sensors (full 645 format) in the next generation of sensors in addition to all the other 'must haves', but I'm not sure we will. Isn't this a better way of adding MPix ?
If anyone out there can shed some light on the manufacturing and cost of making a larger sensor in 645 or 6x6 format, I'd appreciate it, is it very similar to CPU manufacture?

-Nick
« Last Edit: October 13, 2006, 05:36:48 PM by eronald » Logged

Edmund Ronald, Ph.D. 
Steve Kerman
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« Reply #27 on: October 13, 2006, 06:41:11 PM »
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I'm a bit out of date. My impression is that Moore's law applies to stepping on wafers and wafer surface. Which would mean full-frame 645 should be economically feasible around the next generation - my feeling is that the chipmakers are protesting a bit too much that it won't happen. Maybe they would prefer not to do those chip sizes and get some more profilt .

Edmund
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Moore's Law applies to the decreasing feature size of integrated circuits, which in turn means that you can fit the same function is less die area, which in turn means that the cost of that function decreases.

Moore's Law is essentially irrelevant when you are talking about optical sensors of a constant (or increasing) size.

Sorry.
« Last Edit: October 13, 2006, 06:42:06 PM by Steve Kerman » Logged
Steve Kerman
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« Reply #28 on: October 13, 2006, 06:44:39 PM »
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If anyone out there can shed some light on the manufacturing and cost of making a larger sensor in 645 or 6x6 format, I'd appreciate it, is it very similar to CPU manufacture?
The cost of a device at the bleeding edge of semiconductor technology pretty much increases exponentially with the size of the device.
« Last Edit: October 13, 2006, 06:45:20 PM by Steve Kerman » Logged
BernardLanguillier
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« Reply #29 on: October 13, 2006, 07:40:27 PM »
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The combination of extrremely high detail and shallow perceived DOF on prints big enough to reveal that detail sounds rather limited in applicability, but could still be great for appropriate scenes, like landscapes with no foreground elements needing to be sharp. No surprise I suppose that 60MP MF would be targetted at rather special purposes and needs.
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There aren't millions, but there are a few possibilities to solve this:

0. Camera movements in some cases,
1. Foveon like sensors that you helps improving the color quality of these sensors and reduce moire like artifcats withtout reducing too much the size of the pixels,
2. DoF Stacking,
3. ?

Cheers,
Bernard
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A few images online here!
mtomalty
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« Reply #30 on: October 13, 2006, 10:36:29 PM »
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0. Camera movements in some cases,
1. Foveon like sensors that you helps improving the color quality of these sensors and reduce moire like artifcats withtout reducing too much the size of the pixels,
2. DoF Stacking,
3. ?

3. LF film at f22-32. One shot. No centerfold. No color cast  :>))

Mark
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eronald
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« Reply #31 on: October 14, 2006, 05:28:44 AM »
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Moore's Law applies to the decreasing feature size of integrated circuits, which in turn means that you can fit the same function is less die area, which in turn means that the cost of that function decreases.

Moore's Law is essentially irrelevant when you are talking about optical sensors of a constant (or increasing) size.

Sorry.
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Actually, before I did my PHD, I learnt some IC design; I think I probably have as much understanding of this as the average photographer as I've actually designed and had a chip fabricated.

An overly simple yield model is is that at any time you have a given DP*DS which is the probability of having an error in a *small* area DS of the chip, you can easily do the rest of the math yourself, on the back of an envelope (or at least I could when younger), it spits out a yield function which is a factor of chip size declining from 1 (tiny perfect chips) to 0 (huge never working chips) in a negative exponential (I remember this as a Poisson model).

[a href=\"http://www.icyield.com/yieldmod.html]http://www.icyield.com/yieldmod.html[/url]

But DP is not a constant - it falls over time as process technology improves, and  this produces dramatic rises in the chip yield. So we get bigger and bigger chips over time, as you can easily see by going out there.

Now, big CCD-type chips probably have some other issues due to the fact that they are made by multiple masking steps; however I would expect the basic laws to hold, even though yields might jump by quanta (as masking steps are reduced). Indeed we can see marketed CCD and CMOS sensor chips go up in size over time.

Anyway, the bigger chips are already there, it's just an issue of when the yields will make them viable for the commercial MF market - I've been told that both Dalsa an Kodak sensor divisions get their real money from non-civilian applications.

Dr. Edmund Ronald
« Last Edit: October 14, 2006, 05:31:00 AM by eronald » Logged

Edmund Ronald, Ph.D. 
Fred Ragland
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« Reply #32 on: October 14, 2006, 10:42:48 AM »
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Actually, before I did my PHD, I learnt some IC design;Dr. Edmund Ronald
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The level of education on this list is not obvious until you think about it...and then you realize its quite high!  

Of course, photography requires a unique blend of creative and technical prowess that attracts bright people.  It requires visualizing spacial imagery as well as reasoning through how to capture that vision in the camera.  The neuroscientists among us can tell us what proportion of people opt to regularly use "both sides of their head."  To the pleasure of us all, many of them are here!

So its kind of exciting to hit "View New Posts" and see who is out there now.
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Steve Kerman
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« Reply #33 on: October 14, 2006, 12:03:51 PM »
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Edumund, thanks for your lucid explanation!

I actually design chips for a living, but I work at the gate level, so I don't get much into yield issues.

I think you more-or-less confirmed what I was saying--medium format sensor cost doesn't improve from the Moore's Law-related density improvements.  I agree with you that improvements in defect densities will help out sensor costs.  That is of course a much slower improvement rate than the 2x every 2-3 years of Moore's Law.

It's not clear to me how much the defect density plays into the cost of these sensors, because my impression is that they map out bad pixels.  So, unlike a memory chip or a processor, camera sensors can tolerate multiple defects on the device.  So it is conceiveable that the yield is already quite high.  Or perhaps not--I haven't seen that anybody's giving out any yield data.


I have read that the reason for the current size of 645 sensors is that they are fabricating them on 150mm wafers, and this is the biggest they can make them and still fit 4 die on a wafer.  I'm not sure that makes sense, though.  The diagonal of the active area of a 48x36 sensor is 60mm.  That would leave 15mm for support circuits and pads, which seems like a huge amount.  A standard 645 frame has a 70mm diagonal, which would leave 5mm.  Offhand, it seems like that could be made to work; at the least, it would seem that they could get a lot closer to full 645.

If they really are limited to a 60mm diagonal on a 150mm wafer, then we aren't likely to see anything bigger until they make a technology change.  Which, given the size of the market and the target costs, probably means waiting for hand-me-down 200mm or 300mm processing equipment.


I also note in passing that 150mm technology is way, way off the Moore's Law curve.  
« Last Edit: October 14, 2006, 12:05:15 PM by Steve Kerman » Logged
Steve Kerman
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« Reply #34 on: October 14, 2006, 12:15:08 PM »
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I've been told that both Dalsa an Kodak sensor divisions get their real money from non-civilian applications.
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That's very encouraging to hear, actually.  It had occured to me that both companies could leave the market, which would mean the instant death of medium format.  And given that Kodak is not doing well, and Dalsa is a pretty small company, that likelihood of both of them exiting has seemed like a very real possibility.

But, if Uncle Sam is keeping them alive so they can build sensors for the KH satellites, that's a whole new ballgame!  At half a billion +/- dollars per launch, they can afford to pour a lot of money into sensor companies.
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BJL
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« Reply #35 on: October 14, 2006, 12:16:51 PM »
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Now, big CCD-type chips probably have some other issues due to the fact that they are made by multiple masking steps; however I would expect the basic laws to hold, even though yields might jump by quanta (as masking steps are reduced). Indeed we can see marketed CCD and CMOS sensor chips go up in size over time.
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I see no reason to expect the number of masking steps to get smaller, because there is no sign that new generations of fab. equipment have larger field sizes than the previous ones. Instead, chip sizes are generally getting smaller as feature sizes get smaller: compare the new Intel Core Duo chips to previous Pentium chips, so fab. equipment might even move to smaller maximum field sizes.

Canon seems to agree with me: its recent whie paper on "full frame CMOS sensors" mentions the need for multiple masking steps as one reason for its prediction that "FF DSLRs will always cost a lot more than smaller format DSLRs".

Also, I see essentially no size increase in marketed CCD and CMOS sensors in recent years.

Canon has stayed with its three DSLR sensor sizes, but has greatly increased the proportion of its DSLR sales that use the smallest of those three sizes. Each other DSLR makers have stayed with the same sensor size as it has used all along, "APS-C" or 4/3; market share has decreased for 35mm and 1.3x and increased for the smaller DSLR formats. Even digital medium format seems to have topped out at about 36x48mm or 37x49mm, with the biggest of the new sensors using the same size as the previous generation 22MP sensors.
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eronald
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« Reply #36 on: October 14, 2006, 12:54:10 PM »
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Hi Steve,

I admire your ability to concentrate enough on details to do that job ! I'm pretty much burnt out.

You are certainly right in that shrink (smaller gate length) won't push the area defect rate down. Hence I must agree that the size increase of viable sensor chips is considerably  slower than Moore's law which is an aggregate.

As for which defects kill a sensor chip, well you can map out a bad pixel, but if the bad pixel or bad stitch kills a line that's uglier - I don't know how many lines one can remap before the clients get unhappy ...

We know that nobody, ever, gives out accurate yield figures. However, if we knew what the cost of processing a wafer is we would probably be able to deduce a ballpark yield figure

Maybe it's time to chase down the Dalsa or Kodak guys and ask them which way the wind is blowing -

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Edmund, thanks for your lucid explanation!

I actually design chips for a living, but I work at the gate level, so I don't get much into yield issues.

I think you more-or-less confirmed what I was saying--medium format sensor cost doesn't improve from the Moore's Law-related density improvements.  I agree with you that improvements in defect densities will help out sensor costs.  That is of course a much slower improvement rate than the 2x every 2-3 years of Moore's Law.

It's not clear to me how much the defect density plays into the cost of these sensors, because my impression is that they map out bad pixels.  So, unlike a memory chip or a processor, camera sensors can tolerate multiple defects on the device.  So it is conceiveable that the yield is already quite high.  Or perhaps not--I haven't seen that anybody's giving out any yield data.
I have read that the reason for the current size of 645 sensors is that they are fabricating them on 150mm wafers, and this is the biggest they can make them and still fit 4 die on a wafer.  I'm not sure that makes sense, though.  The diagonal of the active area of a 48x36 sensor is 60mm.  That would leave 15mm for support circuits and pads, which seems like a huge amount.  A standard 645 frame has a 70mm diagonal, which would leave 5mm.  Offhand, it seems like that could be made to work; at the least, it would seem that they could get a lot closer to full 645.

If they really are limited to a 60mm diagonal on a 150mm wafer, then we aren't likely to see anything bigger until they make a technology change.  Which, given the size of the market and the target costs, probably means waiting for hand-me-down 200mm or 300mm processing equipment.
I also note in passing that 150mm technology is way, way off the Moore's Law curve. 
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« Reply #37 on: October 14, 2006, 02:26:37 PM »
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Ok, I've got a better picture of what's involved, thanks to all the PHD's, chip designers and general silicon guru's on the forum. Now...
Taking into account that the driving force and profit for CCD development at this level is for government contracts and that only about 10,000 digital backs are sold annually, common sense tells me that it's a case of the 'dog wagging the tail' (Dalsa and Kodak being the 'dog') and not the other way around, which is not the best scenario for us - the tail. To clarify - my perception is that Leaf/Jenoptik/PhaseOne/Mamiya go to Kodak/Dalsa with relatively small orders per year and say 'can we have a 645 CCD please' only to be offered a smaller one due to cost, not Kodak/Dalsa going to all the back manufacturers and trying to sell them their CCD's.
If this is true, we won't see a big drop in price even if yields increase, as the market is too small and there is not (understandibly) enough competition at the CCD fab level. The back manufacturers have to take what's been offered. Shaky ground indeed.
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BJL
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« Reply #38 on: October 14, 2006, 03:16:34 PM »
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my perception is that Leaf/Jenoptik/PhaseOne/Mamiya go to Kodak/Dalsa with relatively small orders per year and say 'can we have a 645 CCD please' ...
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Maybe. It is certainly true that at Kodak's sensor site, the great majority of its sensors are not for "normal" cameras, including MF backs, but are aimed at scientific and engineering equipment. So maybe medium format digital lives on the crumbs of other high end CCD customers, much as DSLR sensor making relies on fabrication equipment designed primarily acording to the needs of other customers, like makers of CPU's and other purely digital electronic devices.

Aside. CCD's are not actually digital; they measure light with an analog signal (a charge) and output this converted to another analog signal (a voltage), which is then converted to digital in an off-chip A/D convertor. CMOS sensors are usually both analog and digital, doing A/D conversion on-chip. This effects fabrication a bit: good sensors apparently require deeper electron wells than purely digital chips.
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eronald
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« Reply #39 on: October 14, 2006, 03:29:01 PM »
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There's a Dalsa presentation around which explains the issues surrounding CCD vs CMOS. There's lso a Canon Cmos white paper. The Dalsa document discusses some of the issues with stitching specifically CCDs ( the join needs to be analog ). We might be seeing the last CCDs now, with a move to CMOS by all players.

Edmund

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Maybe. It is certainly true that at Kodak's sensor site, the great majority of its sensors are not for "normal" cameras, including MF backs, but are aimed at scientific and engineering equipment. So maybe medium format digital lives on the crumbs of other high end CCD customers, much as DSLR sensor making relies on fabrication equipment designed primarily acording to the needs of other customers, like makers of CPU's and other purely digital electronic devices.

Aside. CCD's are not actually digital; they measure light with an analog signal (a charge) and output this converted to another analog signal (a voltage), which is then converted to digital in an off-chip A/D convertor. CMOS sensors are usually both analog and digital, doing A/D conversion on-chip. This effects fabrication a bit: good sensors apparently require deeper electron wells than purely digital chips.
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Edmund Ronald, Ph.D. 
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